RESEARCH PROFILE Manufacturer facts reviewed 18 October 2026 · No Header7F hardware validation
| Detail | Documented context |
|---|---|
| Manufacturer | Terasic |
| FPGA family | Altera Agilex 7 |
| PCIe interface | Gen4 x16 |
| Board shape | PCIe add-in card with QSFP-DD |
| Exact part / DDR / current price / lead time | Not independently verified for a purchasable revision. Confirm against the manufacturer before choosing a board. |
Check the integration boundary.
A current hardware quote, design-software license and exact BSP environment are required to cost a pilot.
PCIe generation and lane count describe an interface; they are not measured capture throughput. Check connector wiring, reference-clock/reset requirements, available DMA examples, tool/license versions and source access for your exact board revision.
Already debugging this board on Linux?
Start with a device-visibility or link-state investigation before considering a capture kit.
Return to the board directory · Console pricing and engineering quotes