AX7103 / PROPOSED CHECKED-CAPTURE KIT

AX7103. Know what reached your capture file.

A proposed Linux/Python capture workflow for ALINX AX7103 and AX7103B. No supported release, hardware validation or performance result is available yet.

PROPOSED KIT Unbuilt · Hardware validation pending · No purchase available

Turn a framed FPGA stream into a file you can inspect—and see where the evidence stops.

For engineers using an AX7103 to prototype a streaming instrument or host-connected FPGA design.

A DMA example can move data without giving you a repeatable record of the exact build, host setup and checks behind a capture. We want to make that complete workflow easier to reproduce.

Request a pilot for this board
TARGET SOFTWARE PRICE$799 USD / team

Research price for a defined release and support scope. Hardware, custom integration and any applicable taxes are excluded. Final scope and terms are undecided. No payment or commitment now.

PROPOSED PATH / NOT A TEST RESULT

01Known FPGA pattern
02DDR / PCIe path
03Linux capture file
04Python checks

Framing and checks would have an explicit boundary. Source correctness and transport correctness are separate questions.

  • ALINX AX7103 / AX7103B
  • Artix-7 · documented Gen2 x4 path
  • One Linux / tool version to agree

THE PACKAGE WE WANT TO TEST

A small workflow.
Enough evidence to repeat it.

These are proposed deliverables to refine with pilot users, not features already implemented.

01

Reference build

Our integration source and a reproducible build manifest for the agreed board/tool profile.

02

Linux recorder

A focused host workflow that preserves the framed data and records its configuration.

03

Python reader

A small example for inspecting the capture format and the checks associated with it.

04

Explicit data checks

Sequence and corruption checks plus overflow reporting at a documented boundary.

05

Repeatable acceptance

Known-pattern tests, process interruption and start/stop cases with honest pass/fail/unknown results.

06

A defined support scope

Exact versions, dependencies, measured limits and exclusions—established during the pilot.

EXACT SCOPE BEFORE A CLAIM

Define the boundary.
Then test the whole path.

The first experiment

Begin with a generated counter/test pattern and a documented framing point. Test recording, deliberate host stalls and repeated start/stop. A real ADC or video source would be a separately agreed extension.

Generated patterns first; one named ADC/video source only after the base path is validated.

What the checks would establish

Sequence and CRC checks would describe the data after the chosen framing point. They would not establish analog accuracy or prove that no samples were lost before framing.

There is no benchmark, supported board matrix, real capture sample or guaranteed repair result from Header7F for this concept yet.

HARDWARE CONTEXT

Build on what exists.

The vendor supplies PCIe/XDMA examples already. Our proposed value is maintained recording, useful failure evidence and reproducible acceptance tests. Exact board variant, revision, source access and dependency terms must be confirmed.

Board context: Gen2 x4 · PCIe add-in card. These are manufacturer-described capabilities, not our measured results.

Manufacturer / board documentation

Board facts reviewed 18 October 2026. Header7F is an independent project; this page does not imply manufacturer endorsement.

HOW A PILOT WOULD START

01 / YOUR TASK

Describe the real need.

Board access, data source, host setup and the capture problem you actually have.

02 / AGREED SCOPE

Choose one configuration.

We discuss fit and define evidence and acceptance criteria before offering paid work.

03 / PROOF FIRST

Review a working result.

A source-based demonstration and clear limits should precede any released-kit claim.

A few practical questions.

Can I download or buy the kit today?

No. This page tests interest in a proposed product. There is no supported release, delivery date or checkout. An enquiry is not an order.

What does the $799 target include?

It is a software-only team-price hypothesis for the stated bounded workflow. Team definition, source/deployment rights, included help, update period and final terms still need agreement. Hardware and custom ports are separate.

Will this fix unknown header type 7f?

It is not a general hardware repair tool. A usable PCIe endpoint is a prerequisite to recording. Use our free diagnostic guide to investigate an inaccessible device.

Do I need to share private data or RTL?

No. A short description of the task and non-confidential configuration is enough for the initial request. The form accepts no uploads.

REQUEST A PROPOSED-KIT PILOT

For ALINX AX7103 / AX7103B. Choose another board

A short description is enough. Leave out raw captures, logs, serial numbers, credentials and confidential designs.

Add technical details or price feedback optional

Feedback only. This is not price acceptance, a purchase or a reservation.

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