
A PIECE OF THE BUILD
Arty A7-100T
Arty A7-100T
Give your RTL a real pin to drive. Start with a deliberately slow counter output you can recognize.
FPGA: Artix-7 XC7A100T
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DSLogic Plus
DSLogic Plus
See the output your design actually produces, with a named signal and a shared ground.
Channels: 16 digital
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Fluke 101
101
Check an appropriate board test point and power-off continuity before blaming the logic.
Use here: Board DC voltage / continuity
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USB-C → Micro-B data cable
USB2CUB1M
Connect a USB-C host to the Arty programming interface with a real data cable.
Model: USB2CUB1M
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Portable anti-static mat
IF145-202-5
Give the board a considered handling surface while you change one part of the setup at a time.
Surface: 60 × 60 cm
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Male/male jumper wires
1957
Bridge the Arty’s female Pmod sockets to the female ends of the analyzer’s supplied fly wires.
Pack: 20 wires
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SDS814X HD 4-channel oscilloscope
SDS814X HD
Check whether a known slow FPGA debug output has a clean voltage transition, then relate that observation to your digital capture.
Analog channels: 4
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SPD1168X programmable bench supply
SPD1168X
Set a documented external board supply deliberately and record its voltage/current-limit settings before comparing startup behavior.
Output capacity: 0–16 V / 0–8 A, 128 W maximum
View on Amazon paid link · confirm current offerDetails & Header7F checksFrom simulation to a real pin
Know what your FPGA actually did.
Build a bench for the moment simulation ends: observe the real output, check the electrical conditions and keep a clear record of the next change.
- ✓ See the sequence
- ✓ Add electrical context
- ✓ Make the next run comparable









